1. Field of the Invention
This invention relates to Modem systems for transmitting and receiving digital data over any kind of channel, and, more particularly, to an automatically adjustable filter for performing the functions of both a digital filter and an adaptive equalizer provided as independent, separate components of modem receivers of conventional prior art construction.
2. Discussion of the Prior Art
As is well known, most transmission channels, e.g., telephone lines, cannot accept DC signal levels, and thus digital data signals, as such, for transmission. Therefore, digital values must be converted to alternating-current (analog) form for transmission. The analog signal waveform furthermore must not contain any DC components since most channels, as stated above, will not transmit DC signals.
The data to be transmitted may be represented as conventional digital digits comprising a series of 0's and 1's. For purposes of illustration, it is assumed that a bit rate of 9600 bits per second of such digital bits is to be transmitted.
The bandwidth of the particular channel in question must, therefore, be examined to determine its capability of transmitting this or any other given level of digital bits. In FIG. 1 is shown for purposes of illustration the conventional telephone line transmission characteristic in which it is seen that the maximum frequency of the bandwidth is approximately 3,000 Hz and the minimum effective frequency is approximately 600 Hz, affording a total effective bandwidth of approximately 2400 Hz.
In accordance with the Nyquist theorum, reconstruction of a transmitted analog waveform requires that a minimum of two samples be derived for each period, i.e., complete cycle of the waveform. Thus, for a bandwidth of 2400 Hz, 4800 samples per second must be derived.
Consider an illustrative example of transmission at 9600 bits per second, and assume we wish to sample at the minimum permissible Nyquist sampling rate for a telephone channel bandwidth of 2400 Hz; it is apparent that the minimum sampling rate will be 4800 samples per second. It then follows that the illustrative 9600 bits per second requires that two bits per sample be transmitted. For this to occur, each sample is assigned one of four discrete values in accordance with the equation: EQU I= log.sub.2 (l)
where l= the number of levels, I= log.sub.2 (4 )= 2 bits per level, whereby l=4 levels. To Convert from a serial stream of 1's and 0's, and where two bits per sample are to be transmitted in accordance with the foregoing, the serial bit stream is analyzed in groups of two successive digits. It is apparent that the possible combinations of digits thus are 00, 01, 10, and 11. These then are the four levels and are suitably identified as levels 1, 2, 3, and 4 in FIG. 2A.
Although these levels 1, 2, 3, and 4 could be used, it is preferable for transmission purposes that a balanced arrangement of these levels be defined. For the levels .+-.1, .+-.2, an imbalance remains as seen in FIG. 2B; therein, the spacing of the levels (+2)- (+1) and of (-1)- (-2) is equal but the spacing (+1)- (-1) is not. Accordingly, the levels .+-.1 and .+-.3 are used, as shown in FIG. 2C, wherein it is now seen that the spacing of the levels (+1)- (+3), (-1)- (-3) and (+1)- (-1) are all equal. (i.e., .+-.2 level unit separation)
The foregoing basic principles are illustrated with respect to a conventional modem transmitter and receiver, shown in FIG. 3. For optimum operation it is desirable that the transmitted data be as nearly random as possible. Randomness of the data may be ensured by combining the digital information to be transmitted with the output of a digital pseudo-random sequence generator 10 in a MODULO-2 adder. MODULO-2 addition of a pseudo-random sequence with the input information produces a data sequence which itself is pseudorandom. To recover the original information, the corrected received signal may be combined with the output of an identical pseudo-random sequence generator in another MODULO-2 adder in the receiver, to be described. Level converter 14 receives the two level, or binary, digital data of 1's and 0's and converts it to a four level signal as before described. Gray coder 16 receives the four level data from converter 14 and converts it to the desired .+-.1 and .+-.3 values. Impulse generator 18 receives the .+-.1 and .+-.3 level values from gray coder 2 to produce pulse-like analog voltage signals of .+-.1, .+-.3 values which are appropriate for transmission over a suitable transmission line or channel, e.g., a telephone line. (The discussion from this point on, will refer to a conventional telephone line as being the channel, only for purposes of illustration. As already stated, the disclosed technique is applicable to any channel through which it is desired to transmit digital data.)
The transmitter filter 20 is used for partially shaping the pulses from impulse generator 18 to adapt more appropriately to the telephone line in view of its (static, known) impulse response characteristics. Typically, the filter is implemented in part at the transmitter and in part at the receiver for improving the noise response characteristics of the system. The filter, of course, shapes the frequency spectrum of the pulses for compliance with the channel in question, such as the 2400 Hz bandpass of the telephone line.
Thus far, signals ranging in frequency from 0 to 2400 Hz have been produced corresponding to four level digit values at a 2400 sample rate or baud (commensurate with a 9600 bit transmission rate). Since DC levels (i.e., 0 Hz) cannot be transmitted, a modulator 22 shifts the frequency from 0 to 2400 up to 600 to 3,000 Hz. Then, the modulated signals are supplied through a level, or impedance, matcher 24 (providing a 600 Ohm output impedance) for matching the system output impedance to that of the transmission line 26. Element 24 also may include a line driver.
For the purposes of this discussion and illustrations, a baud rate has been selected which is of a level at which successive transmitted pulses, or samples, will result in overlap or interpulse interference at the receiver as a result of the bandwidth limitations of the telephone channel. Since it is a desideratum to maximize the rate of transmission, it can be considered that this overlap is essentially unavoidable. This proposition implies, as in fact is the case, that this unavoidable overlap or interpulse interference must be tailored to afford, if not an advantage, at least no difficulty. This is accomplished by a suitable tailoring of the wave shape of the transmitted pulses, typically by the filter 20.
FIG. 4 illustrates the signal which would be received at the receiver as a result of transmision of a single pulse from the transmitter, if all filtering were done at the transmitter. The waveform is plotted as a time function of the baud rate of transmission, also the sampling rate at the receiver. By forcing the wave shape shown, the illustrated waveform has measurable amplitude only at two sample points and all other portions of the waveform pass through zero amplitude at succeeding sample points. This is the familiar type IV form of Partial Response (P.R.) Coding, a detailed description of which can be found in textbooks on data communications.
Reference to FIG. 5 illustrates the effect of transmission of three successive (I, II, III) waveform samples of +1, +1, and +3 values, respectively. It is apparent that substantial overlap occurs. As indicated in FIG. 5, and as is apparent, only on initialization does a unity sample value --i.e., +1 (or -1) ever result, as shown at points b and c. At point d, the first (I) and third (III) signals add algebraically to provide a .+-.2 value. Hence, it is obvious that the signal levels acutally received can only take the values of 0, .+-.2, .+-.4 and .+-.6. It also is apparent that the third waveform (III) (which is the first to illustrate the overlap problem) receives its further contribution from the waveform of the pulse transmitted two baud intervals earlier. It therefore is necessary to provide a decoder at the receiver which performs the function of remembering the value of the pulse received two baud intervals (or sample times) earlier than one currently being received.
A partial response encoder is employed at the transmitter and shown as part of the generator 18. Its function is not that of enabling partial response transmission but rather to correct for, or to eliminate, the propagation errors which can result in this coding scheme. Particularly, since every sample is evaluated in part as a function of the sample two baud intervals earlier, if an error occurs in one, in the succeeding data transmission, every two decisions would continue to be in error. The partial response encoder at the transmitter eliminates this problem in a manner well known. (For a further discussion of partial response coding and transmitters, see U.S. Pat. Nos. 3,638,122 and 3,651,316, assigned to the common assignee herewith.)
The conventional receiver of FIG. 6 includes a low pass filter 30 to remove noise and other hash imposed on the signal's bandwidth by the transmission line at frequencies above 3000 Hz. The demodulator 32 (which may be digital) then provides the 0 to 2400 Hz bandwidth signal and this is supplied to a further filter 33. Filter 33 matches the transmitter/receiver to the known position of the characteristics of the transmission line. An ideal waveform somewhat similar to that transmitted would result in theory-- however, the telephone line itself is a filter, the characteristics of which change in time and thus a distorted waveform output is produced by filter 33. What is required, therefore, is an adaptive filter which changes its characteristics in accordance with changes in the telephone line filter-type characteristics. Accordingly, an adaptive equalizer 34 conventionally is provided to overcome the shortcomings of the telephone line. It is significant that adaptive equalizers are always digital in implementation, since analog implementations are prohibitively complex.
Accordingly, a suitable sampler or analog to digital converter 36 is provided; the A/D output may be, e.g., a ten (10) bit digital word per sample, depending on the number of levels of each sample determined by the baud rate of transmission for a given data rate. Since greatest economics are achieved in a purely digital implementation, the A/D converter preferably is provided at the output of the low pass filter (LPF) 30, permitting use of a digitally implemented demodulator (multiplier) 32. Of interest is the fact that the sampling function of the A/D converter 36 produces distortions in the resulting digital output waveforms which are similar, regardless of the relative locations of the A/D converter 36 and multiplier 32.
The output of the equalizer 34 is supplied in bit pairs to the digital decision device 37 which defines, from the binary word supplied thereto, the closest one of the levels 0, .+-.2, .+-.4, and .+-.6, and provides that level as an output to the partial response decoder 38. Partial response decoder 38 provides .+-.1 and .+-.3 outputs to the derandomizer 40 which in turn supplies .+-.1 and .+-.3 outputs to the gray level decoder 42, the latter providing a serial train of digital 1's and 0's corresponding to the original digital data input.
A principle aspect of modem technology and design is the provision of means for correcting errors in the output data stream. Numerous techniques are practiced, and the elements shown in FIG. 6 for this purpose are illustrative only. Closely associated with the decision device 37 is an amplitude error sensor 44 which generally performs the function-- later discussed as to the mathematics involved-- of identifying the difference between the decision level output of device 37 and the effective voltage level made input thereto, thereby to determine the error in the receiving conditions. For example, the adaptive equalizer 34 may provide an output value of 1.92 or 1.98 on the basis of which a +2 output from the decision device is generated, the decision error being the difference therebetween or, in the first example, 0.08 (or 0.02 in the second example). This value is then used to adjust the tap gain settings in the adaptive equalizer 34 to reduce the error to 0. It is also used, when an error is detected on the decision, to help determine which bit was in error. U.S. Pat. Nos. 3,757,296 and 3,747,065 assigned to the common assignee herein teach digit error detection and correction systems.
An error corrector device 45 has two functions. One of these functions is to sense the presence of a different kind of error, and for this it must receive inputs from various stages of the system which need to provide information that can be used in determining the presence of this different kind of error. This different kind of error can be, but is not restricted to, a sequence of output digits provided by the level decoder 42 which is prohibited because of some intrinsic limitations associated with partial response encoding/decoding.
The second of these functions of the error corrector 45 is to take some action when the aforementioned different kinds of errors have been detected. Such action can be of many types and depends on the desired tradeoff between implementation complexity and performance. One option involves simply invalidating that particular portion of the output by "flaging" it with an error signal; another option involves automatic request for retransmission of the erroneously received portion of the data stream; still other options are possible.
In attempting to correct for distortions arising out of timing errors, the automatic adjustments of the tap gain settings of the automatically adaptive equalizer provide an indication of the timing error itself. If precise timing and phase is achieved, the equalizer settings (assuming a center cap output) comprise . . . 0, 0, 0, 1, 0, 0, 0, 0, . . . . If the equalizer settings differ from this, both an indication of the existence of error and the direction of error are provided by the equalizer tap gain settings. This indication of the timing error then may be used to control the sampling rate (time and phase) of the A to D converter 36. This typically is accomplished by adjusting the clocking rates supplied to a frequency divider which provides the data, sampled at the baud rate, to the A to D converter, the clocking rate being changed by adding or deleting a clock pulse. (See, e.g., U.S. Pat. No. 3,745,248.)
On early modem designs, ten seconds or more was employed for initial acquisition of phase, frequency and timing; a preamble of about five or six 30 seconds was employed, the remaining portion of the ten seconds being used by the modem to pull itself together in coarse tracking operations. Thereafter, the modem was ready to receive data and fine tracking proceeded as to all of frequency, phase and timing. Improved versions of coarse carrier phase and coarse timing controls are disclosed in U.S. Pat. Nos. 3,667,050 and 3,745,248; an improved form of fine timing control is taught in U.S. Pat. No. 3,697,689-- all assigned to the common assignee herein.
FIG. 7 illustrates a portion of the modem receiver of FIG. 6 employing a form of coarse phase and frequency control derived from a pilot signal transmitted with the data. The pilot signal is an undesirable technique, in view of the fact that it occupies a portion of the available bandwidth for transmission of data, hence reducing possible data transmission rates. Nevertheless, the transmitted pilot is effective for providing phase and frequency control and as seen in FIG. 7 is supplied to a phase-lock loop 46 which outputs the injection (demodulation) signal to the demodulator 32a. Such a system may also employ a preamble and, as illustrated, the A/D converter 47 converts the preamble and supplies the pulses to a preamble detector and timing response unit 48, the output of which is supplied to a first terminal of a switch 50, the other terminal of the switch 50 receiving an output from the adaptive equalizer 34'. The terminal of switch 50 connected to the preamble unit 48 is labelled "ACQ'N" (acquisition) and the terminal connected to the output of the equalizer 34' is labelled "TRACK". When a signal is initially received, all of the carrier frequency and phase, and timing control functions are coarse. The pilot signal initially provides frequency and phase control through the phase-lock loop 46 and the preamble, preceding the data transmission, through the units 47 and 48, provides timing control signals based on that preamble. These are supplied through switch 50 in its "ACQ'N" position for controlling the sample timing control circuit 52. In this embodiment, note that the A/D converter 36' is now located to receive the output of the demodulator 32a (in this instance an analog device). When initial acquisition is achieved, switch 50 automatically switches to the "TRACK" position. The timing control outputs of the equalizer then are supplied through the track terminal of switch 50 to control the timing of the sampling control circuit 52 and as well provide fine phase control for the phase-lock loop 46.
The system of FIG. 6 illustrates an improved system not requiring a pilot tone but employing a preamble of brief duration which is supplied from the input signal by the preamble circuit 54 to a phase-lock loop circuit 56, the latter supplying the demodulation (injection) signal to demodulator 32. The PLL 56 output also controls the sampling control circuit 52' in the initial acquisition by virtue of the switch 50'. When acquisition is accomplished, fine timing control then is derived from the output of adaptive equalizer 34 through the TRACK position of switch 50' for the sampling control circuit 52'. Phasing control for the phase-lock loop during tracking also is derived from the adaptive equalizer. If substantial distortions occur, the equalizer outputs are not adequate to provide the fine timing and phase control and, in the case of FIG. 7, the pilot tone resumes its coarse control function. In the case of FIG. 6, it is assumed that the system can adapt sufficiently despite extreme levels of distortion so as to permit the equalizer output to provide the phase and timing control at all times.
As before noted, digital implementation of the modem, to a maximum extent possible, is desirable and, in the case of the adaptive equalizer, is essential, for any practical design. It, moreover, should be appreciated that substantially the entirety of the transmitter and receiver (excepting those elements which directly supply the necessary analog signal to the transmission line or receive same at the receiver) may be implemented in digital fashion. Hence, any of the signal shapers or filters of the system may be digitally implemented. In the case of the receiver of FIG. 6, it will be apparent that the modulation function itself may be digital. Such digital systems employ stable clock sources, as indicated in FIG. 3 and FIG. 6 and suitable frequency divider chains for deriving the necessary clocking rates.
In the receiver of FIG. 6, the low pass filter 30 is intended as an analog device directly receiving the signal from the transmission line, and serves to remove certain frequency components not of interest in that signal introduced by distortions and interferences during transmission.
The analog signal, however, once subjected to sampling by the A/D converter 36, becomes "aliased", i.e., its spectrum is no longer composed of only the true signal spectrum, but instead an infinite number of "aliasing" spectrum components at higher frequencies are introduced. (This is well known from the mathematics of sampling.) Those "aliasing" spectral components must be filtered out before any further processing.
Accordingly, prior systems have provided the digital filter 33 which, as one of its principal functions, operates to "dealias" the converted digital signal. The filter 33, moreover, has the function of partially shaping the signal spectrum so that the desired time-domain response can be obtained; it will be recalled that part of this same function was performed by the filter at the transmitter.
FIG. 8 is a simplified illustration of such a filter or signal shaper. Digital samples at twice the baud rate are derived from the converter 36 and modulator 32 and supplied to the shift register 60. Shift register 60 has a number of stages n determined in accordance with the desired precision of the shaping and "dealiasing" functions. The samples, at twice the baud rate, are successively shifted through the stages by appropriate clocking means (not show). The labelling of the stages (n- 3/2), (n- 1) and (n) indicates the one-half baud interval spacing of the successive samples.
Each of the stages of shift register 60 has associated therewith a fixed multiplier (or divider) 62 (operated in common at the baud rate) to multiply the sample value in its corresponding stage before supplying it into the summing amplifier. The summed output, at the baud rate, from the summing amplifier 64 then is the signal sample of the desired response, both "dealiased" and shaped for the desired time-domain response. Specifically, as known, it is necessary to approximately match the main part of the transmitted signal to the channel characteristics in order to obtain efficient transfer of signal power and maintain high effective signal-to-noise ratio at the receiver. This can be performed by filtration either at the transmitter or the receiver, or partly at both, with the filter characteristics of the transmitter and/or receiver determined in accordance with the signal transfer (i.e., filter) characteristics of the nominal transmission channel (assumed to be known and fixed).
Of course, the transmission channel characteristics vary with time and hence it is the purpose of the adaptive equalizer automatically to compensate for these variations in the transmission channel characteristics and thereby to reduce the combined effects of intersymbol interference and noise. The above-referenced U.S. Pat. No. 3,651,316 illustrates one such form of adaptive equalizer. The adaptive equalizer will be seen to include a number of shift register stages, determined in accordance with the equalization required. The baud rate samples from the filter are supplied to the shift register of the equalizer for further processing and, ultimately, producing the equalized samples on which decisions are made for deriving the final output digital data.
The present invention resides, in part, on the somewhat subtle observation that the cascaded configuration of a digital filter followed by an equalizer is wasteful and that, in fact, a digital filter, modified to include adjustable tap gains (i.e., multipliers with adjustable gains rather than the fixed, weighting resistors of the standard digital filter) can also perform the function of the adaptive equalizer. To accomplish this result, an appropriate algorithm for the tap-adjustment is necessary, as herein detailed. By the elimination of the separate equalizer, a system in accordance with the invention affords a significant reduction in implementation-complexity and cost, as well as improved performance in terms of SNR (i.e., signal-to-noise ratio). Moreover, phase and timing tracking are significantly improved since the absolute delay between the points of error-sensing and error-correcting is reduced by an amount corresponding to the length of the eliminated equalizer. This latter point may be readily appreciated with reference to FIG. 8 and FIG. 6 wherein, since the adaptive equalizer 34 again constitutes a succession of shift register stages, it will be appreciated that a significant delay exists between the sensing of the error at the analog-to-digital converter (sampler) 36 which precedes the digital filter 33 in the signal flow path. It is significant that the delay between the sensing and the correcting of errors determines the highest speed at which errors can be corrected, and hence the highest rate at which the channel can change characteristics and still be tracked by the modem receiver.